HPDP Payload Unit

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HPDP payload processing element is a high performance very versatile computational unit. The board contains two FPGAs that perform the routing and one HPDP chip which performs all the algorithm computations. The HPDP is composed of a systolic array and two serial CPUs that can work independently and can be programmed on-the-fly in a negligible time of around 40us.

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Hi-SIDE data compression module 

Main functions in the Hi-SIDE project

  • Data processing

  • Image compression  (CCSDS123)

  • Encryption (AES256)